[all-commits] [llvm/llvm-project] 257755: [RISCV] Fold (sra (sext_inreg (shl X, C1), i32), C...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 257755530a820ce8d07742332ffcba2ff6eed520
      https://github.com/llvm/llvm-project/commit/257755530a820ce8d07742332ffcba2ff6eed520
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-13 (Wed, 13 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll

  Log Message:
  -----------
  [RISCV] Fold (sra (sext_inreg (shl X, C1), i32), C2) -> (sra (shl X, C1+32), C2+32).

The former pattern will select as slliw+sraiw while the latter
will select as slli+srai. This can enable the slli+srai to be
compressed.

Differential Revision: https://reviews.llvm.org/D129688