[all-commits] [llvm/llvm-project] ded624: [DAG] SimplifyDemandedBits - AND/OR/XOR - attempt ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ded62411f730278016274361e5ce4e5234cc2957
      https://github.com/llvm/llvm-project/commit/ded62411f730278016274361e5ce4e5234cc2957
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-07-12 (Tue, 12 Jul 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll

  Log Message:
  -----------
  [DAG] SimplifyDemandedBits - AND/OR/XOR - attempt basic knownbits simplifications before calling SimplifyMultipleUseDemandedBits

Noticed while investigating the SystemZ regressions in D77804, prefer handling the knownbits analysis/simplification in the bitop nodes directly before falling back to SimplifyMultipleUseDemandedBits