[all-commits] [llvm/llvm-project] 907d92: [RISCV] Move the custom isel for (add X, imm) into...

Craig Topper via All-commits all-commits at lists.llvm.org
Mon Jul 11 10:44:57 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 907d923a20498936793829499f149bbbd5aea023
      https://github.com/llvm/llvm-project/commit/907d923a20498936793829499f149bbbd5aea023
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-11 (Mon, 11 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

  Log Message:
  -----------
  [RISCV] Move the custom isel for (add X, imm) into SelectAddrRegImm.

This custom isel was used to split the lo12 bits of the imm so that
they could be folded into load/store addresses via a post-isel
peephole.

This patch instead splits the immediate during isel and folds the
lo12 removing the need for the post-isel peephole to do anything.

After this we'll be able to remove the post-isel peephole.

Reviewed By: asb, luismarques

Differential Revision: https://reviews.llvm.org/D129450


  Commit: 759e5e0096f650515799805828f9ac5b7d4a7303
      https://github.com/llvm/llvm-project/commit/759e5e0096f650515799805828f9ac5b7d4a7303
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-11 (Mon, 11 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h

  Log Message:
  -----------
  [RISCV] Remove doPeepholeLoadStoreADDI.

All of the cases should be handled by SelectAddrRegImm now.

Reviewed By: asb, luismarques

Differential Revision: https://reviews.llvm.org/D129451


Compare: https://github.com/llvm/llvm-project/compare/1039165b9678...759e5e0096f6


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