[all-commits] [llvm/llvm-project] 4670c1: [AArch64] add test for possible sub->xor enhanceme...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4670c1e55d2411c04dbb2b9a9729a221dbc37c3b
      https://github.com/llvm/llvm-project/commit/4670c1e55d2411c04dbb2b9a9729a221dbc37c3b
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-07-11 (Mon, 11 Jul 2022)

  Changed paths:
    M llvm/test/CodeGen/AArch64/sub1.ll

  Log Message:
  -----------
  [AArch64] add test for possible sub->xor enhancement; NFC


  Commit: 835fd0679a14193c82c49b55297fdc049c05fa5a
      https://github.com/llvm/llvm-project/commit/835fd0679a14193c82c49b55297fdc049c05fa5a
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-07-11 (Mon, 11 Jul 2022)

  Changed paths:
    M llvm/test/Transforms/InstCombine/sub-xor.ll

  Log Message:
  -----------
  [InstCombine] add test for possible sub->xor fold; NFC


  Commit: d0eec5f7e7874ecfdface473cd4718ac5e6e629e
      https://github.com/llvm/llvm-project/commit/d0eec5f7e7874ecfdface473cd4718ac5e6e629e
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-07-11 (Mon, 11 Jul 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/sub1.ll

  Log Message:
  -----------
  [SDAG] enhance sub->xor fold to ignore signbit

As suggested in the post-commit feedback for D128123,
we can ease the mask constraint to ignore the MSB
(and make the code easier to read by adjusting the check).

https://alive2.llvm.org/ce/z/bbvqWv


Compare: https://github.com/llvm/llvm-project/compare/722837105474...d0eec5f7e787