[all-commits] [llvm/llvm-project] 40866b: [DAGCombiner][X86] Fold sra (sub AddC, (shl X, N1C...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 40866b74bd422ae72ad53270d04568249ed53d69
      https://github.com/llvm/llvm-project/commit/40866b74bd422ae72ad53270d04568249ed53d69
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-09 (Sat, 09 Jul 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/X86/shift-combine.ll

  Log Message:
  -----------
  [DAGCombiner][X86] Fold sra (sub AddC, (shl X, N1C)), N1C --> sext (sub AddC1',(trunc X to (width - N1C)))

We already handled this case for add with a constant RHS. A
similar pattern can occur for sub with a constant left hand side.

Test cases use add and a mul representing (neg (shl X, C)) because
that's what I saw in the wild. The mul will be decomposed and then
the new transform can kick in.

Tests have not been committed, but this patch shows the changes.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D128769