[all-commits] [llvm/llvm-project] 439783: [RISCV] Adjust fixed vector coverage for get.activ...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 439783da010ebaf27c09de5092df6eadc8d2be2a
      https://github.com/llvm/llvm-project/commit/439783da010ebaf27c09de5092df6eadc8d2be2a
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-07-07 (Thu, 07 Jul 2022)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll

  Log Message:
  -----------
  [RISCV] Adjust fixed vector coverage for get.active.lane.mask

Make sure we include at least one case where the vsadd/vmsltu lowering
requires only LMUL1.  We should be able to generate all of the fixed
vector variants from scalar to vector idioms, but this is probably not
very important right now given the fixed length variants we'd actually
use when vectorizing with LMUL=1 are reasonable.