[all-commits] [llvm/llvm-project] 20741c: [llvm][AArch64] Fix "+all" feature for sysreg aliases

[David Spickett via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 20741c74c501733dbabda0848cef472131926f0c
      https://github.com/llvm/llvm-project/commit/20741c74c501733dbabda0848cef472131926f0c
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2022-07-06 (Wed, 06 Jul 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
    M llvm/test/MC/Disassembler/AArch64/mattr-all.txt

  Log Message:
  -----------
  [llvm][AArch64] Fix "+all" feature for sysreg aliases

For example the predres extension adds one instruction that
is a sys alias. Previously this wasn't disassembled properly
with "+all".

This was because a check for "+all" was added to haveFeatures
in AArch64SysReg but not in SysAlias.

Reviewed By: MaskRay, lenary

Differential Revision: https://reviews.llvm.org/D129147