[all-commits] [llvm/llvm-project] e4d1d0: [SCEV] Fix isImpliedViaMerge() with values from pr...

[Nikita Popov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e4d1d0cc2c9ca38f98bc9b70c3e3db3a18f1e06e
      https://github.com/llvm/llvm-project/commit/e4d1d0cc2c9ca38f98bc9b70c3e3db3a18f1e06e
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2022-07-05 (Tue, 05 Jul 2022)

  Changed paths:
    M llvm/lib/Analysis/ScalarEvolution.cpp
    M llvm/test/Transforms/IRCE/decrementing-loop.ll
    M llvm/test/Transforms/IndVarSimplify/pr56242.ll

  Log Message:
  -----------
  [SCEV] Fix isImpliedViaMerge() with values from previous iteration (PR56242)

When trying to prove an implied condition on a phi by proving it
for all incoming values, we need to be careful about values coming
from a backedge, as these may refer to a previous loop iteration.
A variant of this issue was fixed in D101829, but the dominance
condition used there isn't quite right: It checks that the value
dominates the incoming block, which doesn't exclude backedges
(values defined in a loop will usually dominate the loop latch,
which is the incoming block of the backedge).

Instead, we should be checking for domination of the phi block.
Any values defined inside the loop will not dominate the loop
header phi.

Fixes https://github.com/llvm/llvm-project/issues/56242.

Differential Revision: https://reviews.llvm.org/D128640