[all-commits] [llvm/llvm-project] e44dcf: [AMDGPU] add alternate tests for max-offset codege...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e44dcfb06eb395e065d20978325801d7a70cdf7a
      https://github.com/llvm/llvm-project/commit/e44dcfb06eb395e065d20978325801d7a70cdf7a
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-06-30 (Thu, 30 Jun 2022)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll

  Log Message:
  -----------
  [AMDGPU] add alternate tests for max-offset codegen; NFC

As discussed in D128123, the existing test shows a possible
regression when converting sub to xor. This adds tests that
avoid that pattern but still has a offset near 65535. Also,
add a test with the canonical IR for the existing test to show
if the transform is happening with the expected pattern in IR.


  Commit: dbe4bb7d12dced75aa54e7942410bed7a8b923ef
      https://github.com/llvm/llvm-project/commit/dbe4bb7d12dced75aa54e7942410bed7a8b923ef
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-06-30 (Thu, 30 Jun 2022)

  Changed paths:
    M llvm/test/Transforms/PhaseOrdering/cmp-logic.ll

  Log Message:
  -----------
  [PhaseOrdering] add test to show missing folds from PR56119; NFC

issue #56119


  Commit: d48a3b866c3d8a7b329907c4adecf29d814ad79c
      https://github.com/llvm/llvm-project/commit/d48a3b866c3d8a7b329907c4adecf29d814ad79c
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-06-30 (Thu, 30 Jun 2022)

  Changed paths:
    M llvm/test/Transforms/InstCombine/icmp-trunc.ll

  Log Message:
  -----------
  [InstCombine] add tests for icmp (trunc X), C; NFC


  Commit: cc88445a9106333bad7679f72031b5602b3a2953
      https://github.com/llvm/llvm-project/commit/cc88445a9106333bad7679f72031b5602b3a2953
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-06-30 (Thu, 30 Jun 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/test/Transforms/InstCombine/icmp-gep.ll
    M llvm/test/Transforms/InstCombine/icmp-trunc.ll
    M llvm/test/Transforms/InstCombine/load-cmp.ll
    M llvm/test/Transforms/InstCombine/memchr.ll
    M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
    M llvm/test/Transforms/PhaseOrdering/cmp-logic.ll

  Log Message:
  -----------
  [InstCombine] canonicalize 'icmp (trunc X), C' to 'icmp (X & Mask), C'

I looked at canonicalizing in the other direction, but that causes
many potential regressions and infinite loops because we already
(possibly wrongly) canonicalize "trunc X to i1" into an and+icmp.

This has a data layout restriction to avoid creating illegal
mask instructions, but we could remove that if we can show
that the backend can undo this when needed.

The motivating example from issue #56119 is modeled by the
PhaseOrdering test.


Compare: https://github.com/llvm/llvm-project/compare/cce06da1ecf7...cc88445a9106