[all-commits] [llvm/llvm-project] 5dcc52: [RISCV] Fold (add X, [-4096, -2049]) or (add X, [2...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5dcc5254925ad84b3949b2bef8345579611bd6f9
      https://github.com/llvm/llvm-project/commit/5dcc5254925ad84b3949b2bef8345579611bd6f9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-06-28 (Tue, 28 Jun 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

  Log Message:
  -----------
  [RISCV] Fold (add X, [-4096, -2049]) or (add X, [2048,4096]) into load/store address during isel.

Previously we iseled this to a pair of ADDIs and relied on a post
isel peephole to fold one of the ADDIs into the load/store. Now
we split the immediate in two parts the same way isel does and fold
one of the pieces. If the add has a non-memory use it will emit
two isels and larger one will CSE with the ADDI we created for the
the memory use.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D128741