[all-commits] [llvm/llvm-project] ddc9e8: [MachineCombiner, AArch64] Add a new pattern A-(B+...

[weiguozhi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ddc9e8861ccf8ac3cf45e9d8cda58bdb2b0be63b
      https://github.com/llvm/llvm-project/commit/ddc9e8861ccf8ac3cf45e9d8cda58bdb2b0be63b
  Author: Guozhi Wei <carrot at google.com>
  Date:   2022-06-28 (Tue, 28 Jun 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineCombinerPattern.h
    M llvm/lib/CodeGen/MachineCombiner.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    A llvm/test/CodeGen/AArch64/machine-combiner-subadd.ll
    A llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir

  Log Message:
  -----------
  [MachineCombiner, AArch64] Add a new pattern A-(B+C) => (A-B)-C to reduce latency

Add a new pattern A - (B + C) ==> (A - B) - C to give machine combiner a chance
to evaluate which instruction sequence has lower latency.

Differential Revision: https://reviews.llvm.org/D124564