[all-commits] [llvm/llvm-project] 17a36c: [RISCV] Zero extend immediate for vget/vset builti...

Craig Topper via All-commits all-commits at lists.llvm.org
Mon Jun 27 20:30:21 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 17a36c7c40e99aa28d4323698f69845d92d96682
      https://github.com/llvm/llvm-project/commit/17a36c7c40e99aa28d4323698f69845d92d96682
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-06-27 (Mon, 27 Jun 2022)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c

  Log Message:
  -----------
  [RISCV] Zero extend immediate for vget/vset builtins to match vector.insert/extract intrinsics.

The vector.insert/extract intrinsics require an i64 immediate argument.
This fixes a crash on RV32.

Differential Revision: https://reviews.llvm.org/D128624




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