[all-commits] [llvm/llvm-project] a83aa3: [IR] Move vector.insert/vector.extract out of expe...

[Bradley Smith via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a83aa33d1bf9e8fe4858391f95a27ffd022e465b
      https://github.com/llvm/llvm-project/commit/a83aa33d1bf9e8fe4858391f95a27ffd022e465b
  Author: Bradley Smith <bradley.smith at arm.com>
  Date:   2022-06-27 (Mon, 27 Jun 2022)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vget-vset-ice.cpp
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c
    M clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
    M clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
    M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c
    M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c
    M clang/test/CodeGen/aarch64-sve-vls-arith-ops.c
    M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
    M clang/test/CodeGen/aarch64-sve-vls-compare-ops.c
    M clang/test/CodeGen/aarch64-sve-vls-shift-ops.c
    M clang/test/CodeGen/aarch64-sve-vls-subscript-ops.c
    M clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c
    M clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_get_neonq.c
    M clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_set_neonq.c
    M clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
    M clang/test/CodeGen/attr-arm-sve-vector-bits-call.c
    M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
    M clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
    M clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
    M llvm/docs/LangRef.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/include/llvm/IR/IRBuilder.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/lib/Analysis/InstructionSimplify.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
    M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
    A llvm/test/Bitcode/upgrade-vector-insert-extract-intrinsics.ll
    A llvm/test/Bitcode/upgrade-vector-insert-extract-intrinsics.ll.bc
    M llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll
    M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
    M llvm/test/CodeGen/AArch64/split-vector-insert.ll
    M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
    M llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
    M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
    M llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
    M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
    M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
    M llvm/test/CodeGen/AArch64/sve-no-typesize-warnings.ll
    M llvm/test/CodeGen/AArch64/sve-punpklo-combine.ll
    M llvm/test/CodeGen/AArch64/sve-vecreduce-fold.ll
    M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vpload.ll
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
    M llvm/test/Transforms/InstCombine/canonicalize-vector-extract.ll
    M llvm/test/Transforms/InstCombine/canonicalize-vector-insert.ll
    M llvm/test/Transforms/InstSimplify/extract-vector.ll
    M llvm/test/Transforms/InstSimplify/insert-vector.ll
    M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
    M llvm/test/Verifier/extract-vector-mismatched-element-types.ll
    M llvm/test/Verifier/insert-extract-intrinsics-invalid.ll
    M llvm/test/Verifier/insert-vector-mismatched-element-types.ll

  Log Message:
  -----------
  [IR] Move vector.insert/vector.extract out of experimental namespace

These intrinsics are now fundemental for SVE code generation and have been
present for a year and a half, hence move them out of the experimental
namespace.

Differential Revision: https://reviews.llvm.org/D127976