[all-commits] [llvm/llvm-project] a0443d: [RISCV] Simplify 16 bit index handling in lowerVEC...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a0443dd47c84abd1ea7a4c3c4e6f14d38a08388a
      https://github.com/llvm/llvm-project/commit/a0443dd47c84abd1ea7a4c3c4e6f14d38a08388a
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-06-24 (Fri, 24 Jun 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Simplify 16 bit index handling in lowerVECTOR_REVERSE [nfc]

getRealMaxVLen returns an upper bound on the value of VLEN.  We can use this upper bound (which unless explicitly set at command line is going to result in a e8 MaxVLMax of much greater than 256) instead of explicitly handling the unknown case separately from the bounded by number greater than 256 case.

Note as well that this code already implicitly depends on a capped value for VLEN.  If infinite VLEN were possible, than 16 bit indices wouldn't be enough.