[all-commits] [llvm/llvm-project] ac4cb1: [X86] fold (and (mul x, c1), c2) -> (mul x, (and c...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ac4cb1775b8f40be2809245b818993a576639c1f
      https://github.com/llvm/llvm-project/commit/ac4cb1775b8f40be2809245b818993a576639c1f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-06-21 (Tue, 21 Jun 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/combine-udiv.ll
    M llvm/test/CodeGen/X86/vector-fshr-128.ll
    M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll

  Log Message:
  -----------
  [X86] fold (and (mul x, c1), c2) -> (mul x, (and c1, c2)) iff c2 is all/no bits mask

Noticed on D128216 - if we're zeroing out vector elements of a mul/mulh result then see if we can merge the and-mask into the mul by just multiplying by zero.

Ideally we'd make this generic (similar to the existing foldSelectWithIdentityConstant?), but these cases are appearing very late, after the constants have been lowered to constant-pool loads.