[all-commits] [llvm/llvm-project] 13107c: [AMDGPU] Add support for GFX11 LDSDIR hazards

Ruiling, Song via All-commits all-commits at lists.llvm.org
Mon Jun 20 13:58:24 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 13107c2770dfdbb95ad07fa9235116fbf26e38f0
      https://github.com/llvm/llvm-project/commit/13107c2770dfdbb95ad07fa9235116fbf26e38f0
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2022-06-20 (Mon, 20 Jun 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    A llvm/test/CodeGen/AMDGPU/lds-direct-hazards.mir

  Log Message:
  -----------
  [AMDGPU] Add support for GFX11 LDSDIR hazards

Detect LDS direct WAR/WAW hazards and compute values for
wait_vdst (va_vdst) parameter.  Where appropriate this
raises wait_vdst from the default 0 to allow concurrent
issue of LDS direct with VALU execution.

Also detect LDS direct versus VMEM source VGPR hazards
and insert vm_vsrc=0 waits using s_waitcnt_depctr.

Differential Revision: https://reviews.llvm.org/D127963


  Commit: 29621c13ef24fe4dea729446ec25f110a205dbe1
      https://github.com/llvm/llvm-project/commit/29621c13ef24fe4dea729446ec25f110a205dbe1
  Author: Piotr Sobczak <Piotr.Sobczak at amd.com>
  Date:   2022-06-20 (Mon, 20 Jun 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
    A llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll

  Log Message:
  -----------
  [AMDGPU] Tag GFX11 LDS loads as using strict_wqm

LDS_PARAM_LOAD and LDS_DIRECT_LOAD use EXEC per quad
(if any pixel is enabled in the quad, data is written
to all 4 pixels/threads in the quad).

Tag LDS_PARAM_LOAD and LDS_DIRECT_LOAD as using strict_wqm
to enforce this and avoid lane clobbering issues.
Note that only the instruction itself is tagged.
The implicit uses of these do not need to be set WQM.
The reduces unnecessary WQM calculation of M0.

Differential Revision: https://reviews.llvm.org/D127977


  Commit: 732eed40fdc799b605a1e16647730d36f185e135
      https://github.com/llvm/llvm-project/commit/732eed40fdc799b605a1e16647730d36f185e135
  Author: Ruiling Song <ruiling.song at amd.com>
  Date:   2022-06-20 (Mon, 20 Jun 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
    A llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll

  Log Message:
  -----------
  [AMDGPU] Mark GFX11 dual source blend export as strict-wqm

The instructions that generate the source of dual source blend export
should run in strict-wqm. That is if any lane in a quad is active,
we need to enable all four lanes of that quad to make the shuffling
operation before exporting to dual source blend target work correctly.

Differential Revision: https://reviews.llvm.org/D127981


Compare: https://github.com/llvm/llvm-project/compare/bbf3fd4af165...732eed40fdc7


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