[all-commits] [llvm/llvm-project] 655ba9: Reland "Reland "Reland "Reland "[X86][RFC] Enable ...

[Phoebe Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 655ba9c8a1d22075443711cc749f0b032e07adee
      https://github.com/llvm/llvm-project/commit/655ba9c8a1d22075443711cc749f0b032e07adee
  Author: Phoebe Wang <phoebe.wang at intel.com>
  Date:   2022-06-17 (Fri, 17 Jun 2022)

  Changed paths:
    M llvm/docs/ReleaseNotes.rst
    M llvm/lib/Target/X86/X86FastISel.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrCompiler.td
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/lib/Target/X86/X86InstrVecCompiler.td
    M llvm/lib/Target/X86/X86InstructionSelector.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.td
    M llvm/test/Analysis/CostModel/X86/fptoi_sat.ll
    M llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
    M llvm/test/CodeGen/X86/atomic-non-integer.ll
    M llvm/test/CodeGen/X86/avx512-insert-extract.ll
    M llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
    M llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll
    M llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll
    M llvm/test/CodeGen/X86/cvt16-2.ll
    M llvm/test/CodeGen/X86/cvt16.ll
    M llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
    M llvm/test/CodeGen/X86/fmf-flags.ll
    M llvm/test/CodeGen/X86/fp-round.ll
    M llvm/test/CodeGen/X86/fp-roundeven.ll
    M llvm/test/CodeGen/X86/fp128-cast-strict.ll
    M llvm/test/CodeGen/X86/fpclamptosat.ll
    M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
    M llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
    M llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
    M llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
    M llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
    M llvm/test/CodeGen/X86/freeze.ll
    M llvm/test/CodeGen/X86/frem.ll
    M llvm/test/CodeGen/X86/half-constrained.ll
    M llvm/test/CodeGen/X86/half.ll
    M llvm/test/CodeGen/X86/pr31088.ll
    M llvm/test/CodeGen/X86/pr38533.ll
    M llvm/test/CodeGen/X86/pr47000.ll
    M llvm/test/CodeGen/X86/scheduler-asm-moves.mir
    M llvm/test/CodeGen/X86/shuffle-extract-subvector.ll
    M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll
    M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
    M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
    M llvm/test/CodeGen/X86/vec_fp_to_int.ll
    M llvm/test/CodeGen/X86/vector-half-conversions.ll
    M llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
    M llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
    M llvm/test/MC/X86/x86_64-asm-match.s
    M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
    M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir

  Log Message:
  -----------
  Reland "Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI""""

This resolves problems reported in commit 1a20252978c76cf2518aa45b175a9e5d6d36c4f0.
1. Promote to float lowering for nodes XINT_TO_FP
2. Bail out f16 from shuffle combine due to vector type is not legal in the version