[all-commits] [llvm/llvm-project] 1a2025: Revert "Reland "Reland "Reland "[X86][RFC] Enable ...
Benjamin Kramer via All-commits
all-commits at lists.llvm.org
Fri Jun 17 00:46:59 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 1a20252978c76cf2518aa45b175a9e5d6d36c4f0
https://github.com/llvm/llvm-project/commit/1a20252978c76cf2518aa45b175a9e5d6d36c4f0
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2022-06-17 (Fri, 17 Jun 2022)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/lib/Target/X86/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86RegisterInfo.td
M llvm/test/Analysis/CostModel/X86/fptoi_sat.ll
M llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
M llvm/test/CodeGen/X86/atomic-non-integer.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
M llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll
M llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll
M llvm/test/CodeGen/X86/cvt16-2.ll
M llvm/test/CodeGen/X86/cvt16.ll
M llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
M llvm/test/CodeGen/X86/fmf-flags.ll
M llvm/test/CodeGen/X86/fp-round.ll
M llvm/test/CodeGen/X86/fp-roundeven.ll
M llvm/test/CodeGen/X86/fp128-cast-strict.ll
M llvm/test/CodeGen/X86/fpclamptosat.ll
M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
M llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
M llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
M llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
M llvm/test/CodeGen/X86/freeze.ll
M llvm/test/CodeGen/X86/frem.ll
M llvm/test/CodeGen/X86/half-constrained.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/pr31088.ll
M llvm/test/CodeGen/X86/pr38533.ll
M llvm/test/CodeGen/X86/pr47000.ll
M llvm/test/CodeGen/X86/scheduler-asm-moves.mir
M llvm/test/CodeGen/X86/shuffle-extract-subvector.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
M llvm/test/CodeGen/X86/vec_fp_to_int.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
M llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
M llvm/test/MC/X86/x86_64-asm-match.s
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir
Log Message:
-----------
Revert "Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI""""
This reverts commit 04a3d5f3a1193fb87576425a385aa0a6115b1e7c.
I see two more issues:
- uitofp/sitofp from i32/i64 to half now generates
__floatsihf/__floatdihf, which exists in neither compiler-rt nor
libgcc
- This crashes when legalizing the bitcast:
```
; RUN: llc < %s -mcpu=skx
define void @main.45(ptr nocapture readnone %retval, ptr noalias nocapture readnone %run_options, ptr noalias nocapture readnone %params, ptr noalias nocapture readonly %buffer_table, ptr noalias nocapture readnone %status, ptr noalias nocapture readnone %prof_counters) local_unnamed_addr {
entry:
%fusion = load ptr, ptr %buffer_table, align 8
%0 = getelementptr inbounds ptr, ptr %buffer_table, i64 1
%Arg_1.2 = load ptr, ptr %0, align 8
%1 = getelementptr inbounds ptr, ptr %buffer_table, i64 2
%Arg_0.1 = load ptr, ptr %1, align 8
%2 = load half, ptr %Arg_0.1, align 8
%3 = bitcast half %2 to i16
%4 = and i16 %3, 32767
%5 = icmp eq i16 %4, 0
%6 = and i16 %3, -32768
%broadcast.splatinsert = insertelement <4 x half> poison, half %2, i64 0
%broadcast.splat = shufflevector <4 x half> %broadcast.splatinsert, <4 x half> poison, <4 x i32> zeroinitializer
%broadcast.splatinsert9 = insertelement <4 x i16> poison, i16 %4, i64 0
%broadcast.splat10 = shufflevector <4 x i16> %broadcast.splatinsert9, <4 x i16> poison, <4 x i32> zeroinitializer
%broadcast.splatinsert11 = insertelement <4 x i16> poison, i16 %6, i64 0
%broadcast.splat12 = shufflevector <4 x i16> %broadcast.splatinsert11, <4 x i16> poison, <4 x i32> zeroinitializer
%broadcast.splatinsert13 = insertelement <4 x i16> poison, i16 %3, i64 0
%broadcast.splat14 = shufflevector <4 x i16> %broadcast.splatinsert13, <4 x i16> poison, <4 x i32> zeroinitializer
%wide.load = load <4 x half>, ptr %Arg_1.2, align 8
%7 = fcmp uno <4 x half> %broadcast.splat, %wide.load
%8 = fcmp oeq <4 x half> %broadcast.splat, %wide.load
%9 = bitcast <4 x half> %wide.load to <4 x i16>
%10 = and <4 x i16> %9, <i16 32767, i16 32767, i16 32767, i16 32767>
%11 = icmp eq <4 x i16> %10, zeroinitializer
%12 = and <4 x i16> %9, <i16 -32768, i16 -32768, i16 -32768, i16 -32768>
%13 = or <4 x i16> %12, <i16 1, i16 1, i16 1, i16 1>
%14 = select <4 x i1> %11, <4 x i16> %9, <4 x i16> %13
%15 = icmp ugt <4 x i16> %broadcast.splat10, %10
%16 = icmp ne <4 x i16> %broadcast.splat12, %12
%17 = or <4 x i1> %15, %16
%18 = select <4 x i1> %17, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>
%19 = add <4 x i16> %18, %broadcast.splat14
%20 = select i1 %5, <4 x i16> %14, <4 x i16> %19
%21 = select <4 x i1> %8, <4 x i16> %9, <4 x i16> %20
%22 = bitcast <4 x i16> %21 to <4 x half>
%23 = select <4 x i1> %7, <4 x half> <half 0xH7E00, half 0xH7E00, half 0xH7E00, half 0xH7E00>, <4 x half> %22
store <4 x half> %23, ptr %fusion, align 16
ret void
}
```
llc: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:977: void (anonymous namespace)::SelectionDAGLegalize::LegalizeOp(llvm::SDNode *): Assertion `(TLI.getTypeAction(*DAG.getContext(), Op.getValueType()) == TargetLowering::TypeLegal || Op.getOpcode() == ISD::TargetConstant || Op.getOpcode() == ISD::Register) && "Unexpected illegal type!"' failed.
More information about the All-commits
mailing list