[all-commits] [llvm/llvm-project] 2fa2ce: [RISCV] Start merging demanded reasoning - startin...

Philip Reames via All-commits all-commits at lists.llvm.org
Thu Jun 16 14:40:45 PDT 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2fa2cee6a84b7fe7d4390259b71a67fd8596787f
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-06-16 (Thu, 16 Jun 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

  Log Message:
  [RISCV] Start merging demanded reasoning - starting with load/stores [nfc]

This change merges the logic for reasoning about demanded portions of the VTYPE register between the main dataflow algorithm and the backwards mutation post pass. In the process, we get to delete a bunch of now redundant code.

This should be entirely NFC. I included a slight hack (see TODO) to avoid changing behavior in the post pass while being able to use the generalized logic in the prepass. I will fix the TODO in a separate change once this lands.

Differential Revision: https://reviews.llvm.org/D127983

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