[all-commits] [llvm/llvm-project] a36c80: [mlir][bufferize] Better implementation of Analysi...

[Matthias Springer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a36c801d127a2c4264ce0b7d1377b491409603cc
      https://github.com/llvm/llvm-project/commit/a36c801d127a2c4264ce0b7d1377b491409603cc
  Author: Matthias Springer <springerm at google.com>
  Date:   2022-06-15 (Wed, 15 Jun 2022)

  Changed paths:
    M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
    M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
    M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
    M mlir/test/Dialect/Bufferization/Transforms/tensor-copy-insertion.mlir

  Log Message:
  -----------
  [mlir][bufferize] Better implementation of AnalysisState::isTensorYielded

If `create-deallocs=0`, mark all bufferization.alloc_tensor ops as escaping. (Unless they already have an `escape` attribute.) In the absence of analysis information, check SSA use-def chains to see if the value may be yielded.

Differential Revision: https://reviews.llvm.org/D127302