[all-commits] [llvm/llvm-project] 1582bc: RISCV: handle 64-bit PCREL data relocations

[Saleem Abdulrasool via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1582bcd0038dbf0b82f11f105ded0b223a40fcec
      https://github.com/llvm/llvm-project/commit/1582bcd0038dbf0b82f11f105ded0b223a40fcec
  Author: Saleem Abdulrasool <compnerd at compnerd.org>
  Date:   2022-06-14 (Tue, 14 Jun 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
    A llvm/test/MC/RISCV/riscv64-64b-pcrel.s

  Log Message:
  -----------
  RISCV: handle 64-bit PCREL data relocations

We would previously fail to handle 64-bit PC-relative relocations on
RISCV.  This was exposed by trying to build with
`-fprofile-instr-generate`.

The original changes restricted the relocation handling to the text
segment as the paired relocations are undesirable in at least the debug
and .eh_frame sections.  We now make this explicit to handle the general
case for the data relocations as well.

It would be preferable to use `R_RISCV_n_PCREL` when available to avoid
an extra relocation.

Differential Revision: https://reviews.llvm.org/D127549
Reviewed By: luismarques, MaskRay

Fixes: #55971