[all-commits] [llvm/llvm-project] 095bf6: [Greedy RegAlloc] Fix the handling of split regist...

[serguei-katkov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 095bf6be28c5308a7e7c2cbc5a84adbb11bef57d
      https://github.com/llvm/llvm-project/commit/095bf6be28c5308a7e7c2cbc5a84adbb11bef57d
  Author: Serguei Katkov <serguei.katkov at azul.com>
  Date:   2022-06-14 (Tue, 14 Jun 2022)

  Changed paths:
    M llvm/lib/CodeGen/RegAllocGreedy.cpp
    A llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
    M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll

  Log Message:
  -----------
  [Greedy RegAlloc] Fix the handling of split register in last chance re-coloring.

This is a fix for https://github.com/llvm/llvm-project/issues/55827.

When register we are trying to re-color is split the original register (we tried to recover)
has no uses after the split. However in rollback actions we assign back physical register to it.
Later it causes different assertions. One of them is in attached test.

This CL fixes this by avoiding assigning physical register back to register which has no usage
or its live interval now is empty.

Reviewed By: arsenm, qcolombet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D127281