[all-commits] [llvm/llvm-project] cb9ae9: [AMDGPU] Define SGPR_NULL64 register. NFCI.

[Stanislav Mekhanoshin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cb9ae93712464858c8deaf18dea25d41a9d5212a
      https://github.com/llvm/llvm-project/commit/cb9ae93712464858c8deaf18dea25d41a9d5212a
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2022-06-13 (Mon, 13 Jun 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

  Log Message:
  -----------
  [AMDGPU] Define SGPR_NULL64 register. NFCI.

On gfx10+ null register can be used as both 32 and 64 bit operand.
Define a 64 bit version of the register to use during codegen.

Differential Revision: https://reviews.llvm.org/D127527