[all-commits] [llvm/llvm-project] 93b4a4: [RISCV] Add vread_csr and vwrite_csr to riscv_vect...
Wang Pengcheng via All-commits
all-commits at lists.llvm.org
Mon Jun 13 05:39:26 PDT 2022
Author: wangpc <pc.wang at linux.alibaba.com>
Date: 2022-06-13 (Mon, 13 Jun 2022)
[RISCV] Add vread_csr and vwrite_csr to riscv_vector.h
These two functions are described in RVV intrinsics doc
to read/write RVV CSRs. This matches what GCC does.
This reapply aebe24a which was reverted in 0f6f429 due
to missing REQUIRES in tests.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D125875
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