[all-commits] [llvm/llvm-project] 11cf2d: [mlir][spirv] Unify aliases of different bitwidth ...

[Lei Zhang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 11cf2d5f62f94b14644fab3478f17af9cb015706
      https://github.com/llvm/llvm-project/commit/11cf2d5f62f94b14644fab3478f17af9cb015706
  Author: Lei Zhang <antiagainst at gmail.com>
  Date:   2022-06-10 (Fri, 10 Jun 2022)

  Changed paths:
    M mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp
    M mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir

  Log Message:
  -----------
  [mlir][spirv] Unify aliases of different bitwidth scalar types

This commit extends the UnifyAliasedResourcePass to handle scalar
types of different bitwidths. It requires to get the smaller bitwidth
resource as the canonical resource so that we can avoid subcomponent
load/store. Instead we load/store multiple smaller bitwidth ones.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D127266


  Commit: e90b56e411867bca5d053b276a6319cfb3db62cb
      https://github.com/llvm/llvm-project/commit/e90b56e411867bca5d053b276a6319cfb3db62cb
  Author: Lei Zhang <antiagainst at google.com>
  Date:   2022-06-10 (Fri, 10 Jun 2022)

  Changed paths:
    M mlir/test/mlir-vulkan-runner/time.mlir

  Log Message:
  -----------
  [mlir][vulkan] Add missing '<>'  in test IRs to fix test


Compare: https://github.com/llvm/llvm-project/compare/ff4abe755279...e90b56e41186