[all-commits] [llvm/llvm-project] 4bcfc4: [SelectionDAG] Teach computeKnownBits that a nsw s...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4bcfc418464b0bd0169ace715043789cccb77365
      https://github.com/llvm/llvm-project/commit/4bcfc418464b0bd0169ace715043789cccb77365
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-06-08 (Wed, 08 Jun 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/RISCV/rv64i-demanded-bits.ll
    M llvm/test/CodeGen/Thumb2/mve-vqdmulh-minmax.ll

  Log Message:
  -----------
  [SelectionDAG] Teach computeKnownBits that a nsw self multiply produce a positive value.

This matches what we do in IR. For the RISC-V test case, this allows
us to use -8 for the AND mask instead of materializing a constant in a register.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D127335