[all-commits] [llvm/llvm-project] 1ea993: [RISCV] Untangle instruction properties from VSETV...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1ea99328b45698bee92ccabe34f686ad3c024888
      https://github.com/llvm/llvm-project/commit/1ea99328b45698bee92ccabe34f686ad3c024888
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-06-08 (Wed, 08 Jun 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

  Log Message:
  -----------
  [RISCV] Untangle instruction properties from VSETVLIInfo [NFC]

The abstract state used in the data flow should not know anything about the instructions which produced the abstract states. Instead, when comparing two states, we can simply use information about the machine instr at that time.

In the old design, basically any use of the instruction flags on the current (as opposed to a "Require" - aka upcoming state) would be a bug. We don't seem to actually have any such bugs, but we can make this much more obvious with code structure.

Differential Revision: https://reviews.llvm.org/D126921