[all-commits] [llvm/llvm-project] a4d2c5: [InstCombine] reduce code duplication for accessin...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a4d2c5ecaae95d529dc31a2a97ef51960cbbc623
      https://github.com/llvm/llvm-project/commit/a4d2c5ecaae95d529dc31a2a97ef51960cbbc623
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-06-07 (Tue, 07 Jun 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

  Log Message:
  -----------
  [InstCombine] reduce code duplication for accessing type; NFC


  Commit: 0856a6cb7ad628dc2f352d2126d7b7f9c7e4e9f4
      https://github.com/llvm/llvm-project/commit/0856a6cb7ad628dc2f352d2126d7b7f9c7e4e9f4
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-06-07 (Tue, 07 Jun 2022)

  Changed paths:
    M llvm/test/Transforms/InstCombine/shift-shift.ll

  Log Message:
  -----------
  [InstCombine] add tests for left-shift-of-right-shifted constant; NFC

The tests are adapted from the sibling folds' tests (see D127122).


  Commit: cae993d4c87fa2d0664bb711f100ef7b563f77d9
      https://github.com/llvm/llvm-project/commit/cae993d4c87fa2d0664bb711f100ef7b563f77d9
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-06-07 (Tue, 07 Jun 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/shift-shift.ll

  Log Message:
  -----------
  [InstCombine] [InstCombine] reduce left-shift-of-right-shifted constant via demanded bits

If we don't demand low bits and it is valid to pre-shift a constant:
(C2 >> X) << C1 --> (C2 << C1) >> X

https://alive2.llvm.org/ce/z/_UzTMP

This is the reverse-order shift sibling to 82040d414b3c ( D127122 ).
It seems likely that we would want to add this to the SDAG version of
the code too to keep it on par with IR.


Compare: https://github.com/llvm/llvm-project/compare/b5b33fbffb08...cae993d4c87f