[all-commits] [llvm/llvm-project] cfe516: AMDGPU: Make PSV instances static members

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cfe516849907da762c40d7dea2b6c2256d264c48
      https://github.com/llvm/llvm-project/commit/cfe516849907da762c40d7dea2b6c2256d264c48
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-06-07 (Tue, 07 Jun 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h

  Log Message:
  -----------
  AMDGPU: Make PSV instances static members


  Commit: cc5a1b3dd9039d50f6b9caa679d60398f0cec65f
      https://github.com/llvm/llvm-project/commit/cc5a1b3dd9039d50f6b9caa679d60398f0cec65f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-06-07 (Tue, 07 Jun 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/ARC/ARCMachineFunctionInfo.cpp
    M llvm/lib/Target/ARC/ARCMachineFunctionInfo.h
    M llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
    M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
    M llvm/lib/Target/AVR/AVRMachineFunctionInfo.h
    M llvm/lib/Target/CSKY/CSKYMachineFunctionInfo.h
    M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
    M llvm/lib/Target/Lanai/LanaiMachineFunctionInfo.cpp
    M llvm/lib/Target/Lanai/LanaiMachineFunctionInfo.h
    M llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h
    M llvm/lib/Target/M68k/M68kMachineFunction.cpp
    M llvm/lib/Target/M68k/M68kMachineFunction.h
    M llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp
    M llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h
    M llvm/lib/Target/Mips/MipsMachineFunction.cpp
    M llvm/lib/Target/Mips/MipsMachineFunction.h
    M llvm/lib/Target/NVPTX/NVPTXMachineFunctionInfo.h
    M llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
    M llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
    M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
    M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
    M llvm/lib/Target/Sparc/SparcMachineFunctionInfo.cpp
    M llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h
    M llvm/lib/Target/SystemZ/SystemZMachineFunctionInfo.cpp
    M llvm/lib/Target/SystemZ/SystemZMachineFunctionInfo.h
    M llvm/lib/Target/VE/VEMachineFunctionInfo.cpp
    M llvm/lib/Target/VE/VEMachineFunctionInfo.h
    M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
    M llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
    M llvm/lib/Target/X86/X86MachineFunctionInfo.h
    M llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp
    M llvm/lib/Target/XCore/XCoreMachineFunctionInfo.h
    A llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir
    A llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-riscv.mir
    M llvm/tools/llvm-reduce/ReducerWorkItem.cpp

  Log Message:
  -----------
  llvm-reduce: Add cloning of target MachineFunctionInfo

MIR support is totally unusable for AMDGPU without this, since the set
of reserved registers is set from fields here.

Add a clone method to MachineFunctionInfo. This is a subtle variant of
the copy constructor that is required if there are any MIR constructs
that use pointers. Specifically, at minimum fields that reference
MachineBasicBlocks or the MachineFunction need to be adjusted to the
values in the new function.


Compare: https://github.com/llvm/llvm-project/compare/222bd83d5057...cc5a1b3dd903