[all-commits] [llvm/llvm-project] 576b82: [WebAssembly][NFC] RelaxedBinary tablegen multicla...

[Thomas Lively via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 576b8245c838e822f709d8450f537c7909d45411
      https://github.com/llvm/llvm-project/commit/576b8245c838e822f709d8450f537c7909d45411
  Author: Thomas Lively <tlively at google.com>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

  Log Message:
  -----------
  [WebAssembly][NFC] RelaxedBinary tablegen multiclass for relaxed SIMD

Refactor the tablegen definitions for relaxed SIMD min/max instructions to use a
shared RelaxedBinary multiclass modeled on the existing SIMDBinary multiclass. A
future commit will add further instruction definitions that use RelaxedBinary.

Also rename the SIMD_RELAXED_CONVERT multiclass to RelaxedConvert to better fit
existing naming conventions.

Reviewed By: aheejin

Differential Revision: https://reviews.llvm.org/D127157