[all-commits] [llvm/llvm-project] 4fed5f: [AMDGPU][GFX8][DOC][NFC] Update assembler syntax d...

dpreobra via All-commits all-commits at lists.llvm.org
Mon Jun 6 07:43:03 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4fed5f174fa57c73907bb3344018a5f9c2bc2e68
      https://github.com/llvm/llvm-project/commit/4fed5f174fa57c73907bb3344018a5f9c2bc2e68
  Author: Dmitry Preobrazhensky <d-pre at mail.ru>
  Date:   2022-06-06 (Mon, 06 Jun 2022)

  Changed paths:
    M llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
    M llvm/docs/AMDGPU/gfx8_hwreg.rst
    R llvm/docs/AMDGPU/gfx8_imm16.rst
    R llvm/docs/AMDGPU/gfx8_imm16_1.rst
    R llvm/docs/AMDGPU/gfx8_imm16_2.rst
    A llvm/docs/AMDGPU/gfx8_imm16_73139a.rst
    A llvm/docs/AMDGPU/gfx8_imm16_a04fb3.rst
    R llvm/docs/AMDGPU/gfx8_m.rst
    R llvm/docs/AMDGPU/gfx8_m_1.rst
    A llvm/docs/AMDGPU/gfx8_m_254bcb.rst
    A llvm/docs/AMDGPU/gfx8_m_f5d306.rst
    M llvm/docs/AMDGPU/gfx8_msg.rst
    R llvm/docs/AMDGPU/gfx8_opt.rst
    A llvm/docs/AMDGPU/gfx8_opt_0d447d.rst
    A llvm/docs/AMDGPU/gfx8_opt_847aed.rst
    R llvm/docs/AMDGPU/gfx8_sbase.rst
    A llvm/docs/AMDGPU/gfx8_sbase_010ce0.rst
    R llvm/docs/AMDGPU/gfx8_sbase_1.rst
    A llvm/docs/AMDGPU/gfx8_sbase_589eed.rst
    R llvm/docs/AMDGPU/gfx8_sdata.rst
    R llvm/docs/AMDGPU/gfx8_sdata_1.rst
    R llvm/docs/AMDGPU/gfx8_sdata_2.rst
    A llvm/docs/AMDGPU/gfx8_sdata_7cbd60.rst
    A llvm/docs/AMDGPU/gfx8_sdata_c8788e.rst
    A llvm/docs/AMDGPU/gfx8_sdata_e587f5.rst
    R llvm/docs/AMDGPU/gfx8_sdst.rst
    A llvm/docs/AMDGPU/gfx8_sdst_0804b1.rst
    R llvm/docs/AMDGPU/gfx8_sdst_1.rst
    A llvm/docs/AMDGPU/gfx8_sdst_1cf20d.rst
    R llvm/docs/AMDGPU/gfx8_sdst_2.rst
    R llvm/docs/AMDGPU/gfx8_sdst_3.rst
    A llvm/docs/AMDGPU/gfx8_sdst_313759.rst
    A llvm/docs/AMDGPU/gfx8_sdst_362c37.rst
    R llvm/docs/AMDGPU/gfx8_sdst_4.rst
    R llvm/docs/AMDGPU/gfx8_sdst_5.rst
    R llvm/docs/AMDGPU/gfx8_sdst_6.rst
    A llvm/docs/AMDGPU/gfx8_sdst_61db0e.rst
    A llvm/docs/AMDGPU/gfx8_sdst_6eddac.rst
    R llvm/docs/AMDGPU/gfx8_sdst_7.rst
    A llvm/docs/AMDGPU/gfx8_sdst_78579b.rst
    A llvm/docs/AMDGPU/gfx8_sdst_8d900a.rst
    R llvm/docs/AMDGPU/gfx8_simm32.rst
    R llvm/docs/AMDGPU/gfx8_simm32_1.rst
    R llvm/docs/AMDGPU/gfx8_simm32_2.rst
    A llvm/docs/AMDGPU/gfx8_simm32_6f0844.rst
    A llvm/docs/AMDGPU/gfx8_simm32_a3e80c.rst
    A llvm/docs/AMDGPU/gfx8_simm32_be0c1c.rst
    R llvm/docs/AMDGPU/gfx8_soffset.rst
    R llvm/docs/AMDGPU/gfx8_soffset_1.rst
    R llvm/docs/AMDGPU/gfx8_soffset_2.rst
    A llvm/docs/AMDGPU/gfx8_soffset_499d5b.rst
    A llvm/docs/AMDGPU/gfx8_soffset_abb420.rst
    A llvm/docs/AMDGPU/gfx8_soffset_ac5750.rst
    R llvm/docs/AMDGPU/gfx8_src.rst
    A llvm/docs/AMDGPU/gfx8_src_021c9b.rst
    R llvm/docs/AMDGPU/gfx8_src_1.rst
    R llvm/docs/AMDGPU/gfx8_src_10.rst
    R llvm/docs/AMDGPU/gfx8_src_2.rst
    A llvm/docs/AMDGPU/gfx8_src_2dcf49.rst
    R llvm/docs/AMDGPU/gfx8_src_3.rst
    A llvm/docs/AMDGPU/gfx8_src_39a989.rst
    R llvm/docs/AMDGPU/gfx8_src_4.rst
    R llvm/docs/AMDGPU/gfx8_src_5.rst
    A llvm/docs/AMDGPU/gfx8_src_516946.rst
    R llvm/docs/AMDGPU/gfx8_src_6.rst
    A llvm/docs/AMDGPU/gfx8_src_67227c.rst
    R llvm/docs/AMDGPU/gfx8_src_7.rst
    R llvm/docs/AMDGPU/gfx8_src_8.rst
    A llvm/docs/AMDGPU/gfx8_src_87dc5c.rst
    A llvm/docs/AMDGPU/gfx8_src_8a6ea8.rst
    R llvm/docs/AMDGPU/gfx8_src_9.rst
    A llvm/docs/AMDGPU/gfx8_src_a13aeb.rst
    A llvm/docs/AMDGPU/gfx8_src_b38805.rst
    A llvm/docs/AMDGPU/gfx8_src_d9175b.rst
    A llvm/docs/AMDGPU/gfx8_src_df6b53.rst
    R llvm/docs/AMDGPU/gfx8_srsrc.rst
    R llvm/docs/AMDGPU/gfx8_srsrc_1.rst
    A llvm/docs/AMDGPU/gfx8_srsrc_cf7132.rst
    A llvm/docs/AMDGPU/gfx8_srsrc_e73d16.rst
    R llvm/docs/AMDGPU/gfx8_ssrc.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_0eec95.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_1.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_133cbc.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_2.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_3.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_4.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_5.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_6.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_6706dc.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_7.rst
    R llvm/docs/AMDGPU/gfx8_ssrc_8.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_a2142e.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_c8788e.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_dcd0d4.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_e587f5.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_f308b1.rst
    A llvm/docs/AMDGPU/gfx8_ssrc_f48190.rst
    M llvm/docs/AMDGPU/gfx8_tgt.rst
    R llvm/docs/AMDGPU/gfx8_vaddr.rst
    R llvm/docs/AMDGPU/gfx8_vaddr_1.rst
    R llvm/docs/AMDGPU/gfx8_vaddr_2.rst
    R llvm/docs/AMDGPU/gfx8_vaddr_3.rst
    A llvm/docs/AMDGPU/gfx8_vaddr_9f7133.rst
    A llvm/docs/AMDGPU/gfx8_vaddr_b73dc0.rst
    A llvm/docs/AMDGPU/gfx8_vaddr_e9b690.rst
    A llvm/docs/AMDGPU/gfx8_vaddr_f20ee4.rst
    R llvm/docs/AMDGPU/gfx8_vdata.rst
    R llvm/docs/AMDGPU/gfx8_vdata0.rst
    R llvm/docs/AMDGPU/gfx8_vdata0_1.rst
    A llvm/docs/AMDGPU/gfx8_vdata0_6802ce.rst
    A llvm/docs/AMDGPU/gfx8_vdata0_fd235e.rst
    R llvm/docs/AMDGPU/gfx8_vdata1.rst
    R llvm/docs/AMDGPU/gfx8_vdata1_1.rst
    A llvm/docs/AMDGPU/gfx8_vdata1_6802ce.rst
    A llvm/docs/AMDGPU/gfx8_vdata1_fd235e.rst
    R llvm/docs/AMDGPU/gfx8_vdata_1.rst
    R llvm/docs/AMDGPU/gfx8_vdata_10.rst
    R llvm/docs/AMDGPU/gfx8_vdata_11.rst
    R llvm/docs/AMDGPU/gfx8_vdata_12.rst
    R llvm/docs/AMDGPU/gfx8_vdata_13.rst
    R llvm/docs/AMDGPU/gfx8_vdata_14.rst
    R llvm/docs/AMDGPU/gfx8_vdata_2.rst
    R llvm/docs/AMDGPU/gfx8_vdata_3.rst
    A llvm/docs/AMDGPU/gfx8_vdata_325b78.rst
    R llvm/docs/AMDGPU/gfx8_vdata_4.rst
    A llvm/docs/AMDGPU/gfx8_vdata_4d8ecf.rst
    A llvm/docs/AMDGPU/gfx8_vdata_4f639e.rst
    R llvm/docs/AMDGPU/gfx8_vdata_5.rst
    A llvm/docs/AMDGPU/gfx8_vdata_56f215.rst
    R llvm/docs/AMDGPU/gfx8_vdata_6.rst
    A llvm/docs/AMDGPU/gfx8_vdata_6802ce.rst
    R llvm/docs/AMDGPU/gfx8_vdata_7.rst
    R llvm/docs/AMDGPU/gfx8_vdata_8.rst
    A llvm/docs/AMDGPU/gfx8_vdata_87fb90.rst
    A llvm/docs/AMDGPU/gfx8_vdata_886702.rst
    R llvm/docs/AMDGPU/gfx8_vdata_9.rst
    A llvm/docs/AMDGPU/gfx8_vdata_a9eee3.rst
    A llvm/docs/AMDGPU/gfx8_vdata_aeb804.rst
    A llvm/docs/AMDGPU/gfx8_vdata_b2a787.rst
    A llvm/docs/AMDGPU/gfx8_vdata_c08393.rst
    A llvm/docs/AMDGPU/gfx8_vdata_c61803.rst
    A llvm/docs/AMDGPU/gfx8_vdata_e016a1.rst
    A llvm/docs/AMDGPU/gfx8_vdata_f2bf57.rst
    A llvm/docs/AMDGPU/gfx8_vdata_fd235e.rst
    R llvm/docs/AMDGPU/gfx8_vdst.rst
    A llvm/docs/AMDGPU/gfx8_vdst_0b9599.rst
    R llvm/docs/AMDGPU/gfx8_vdst_1.rst
    R llvm/docs/AMDGPU/gfx8_vdst_10.rst
    R llvm/docs/AMDGPU/gfx8_vdst_11.rst
    R llvm/docs/AMDGPU/gfx8_vdst_12.rst
    R llvm/docs/AMDGPU/gfx8_vdst_13.rst
    R llvm/docs/AMDGPU/gfx8_vdst_14.rst
    R llvm/docs/AMDGPU/gfx8_vdst_15.rst
    R llvm/docs/AMDGPU/gfx8_vdst_16.rst
    R llvm/docs/AMDGPU/gfx8_vdst_17.rst
    R llvm/docs/AMDGPU/gfx8_vdst_2.rst
    R llvm/docs/AMDGPU/gfx8_vdst_3.rst
    A llvm/docs/AMDGPU/gfx8_vdst_3c54c3.rst
    A llvm/docs/AMDGPU/gfx8_vdst_3c6fb6.rst
    A llvm/docs/AMDGPU/gfx8_vdst_3d7dcf.rst
    R llvm/docs/AMDGPU/gfx8_vdst_4.rst
    A llvm/docs/AMDGPU/gfx8_vdst_463513.rst
    A llvm/docs/AMDGPU/gfx8_vdst_48e42f.rst
    R llvm/docs/AMDGPU/gfx8_vdst_5.rst
    A llvm/docs/AMDGPU/gfx8_vdst_5d50a1.rst
    R llvm/docs/AMDGPU/gfx8_vdst_6.rst
    A llvm/docs/AMDGPU/gfx8_vdst_69a144.rst
    R llvm/docs/AMDGPU/gfx8_vdst_7.rst
    A llvm/docs/AMDGPU/gfx8_vdst_7eb33e.rst
    R llvm/docs/AMDGPU/gfx8_vdst_8.rst
    A llvm/docs/AMDGPU/gfx8_vdst_875645.rst
    A llvm/docs/AMDGPU/gfx8_vdst_89680f.rst
    R llvm/docs/AMDGPU/gfx8_vdst_9.rst
    A llvm/docs/AMDGPU/gfx8_vdst_a49b76.rst
    A llvm/docs/AMDGPU/gfx8_vdst_bdb32f.rst
    A llvm/docs/AMDGPU/gfx8_vdst_d0dc43.rst
    A llvm/docs/AMDGPU/gfx8_vdst_d7c57e.rst
    A llvm/docs/AMDGPU/gfx8_vdst_d85497.rst
    A llvm/docs/AMDGPU/gfx8_vdst_e0515f.rst
    A llvm/docs/AMDGPU/gfx8_vdst_f47754.rst
    R llvm/docs/AMDGPU/gfx8_vsrc.rst
    R llvm/docs/AMDGPU/gfx8_vsrc_1.rst
    R llvm/docs/AMDGPU/gfx8_vsrc_2.rst
    R llvm/docs/AMDGPU/gfx8_vsrc_3.rst
    A llvm/docs/AMDGPU/gfx8_vsrc_533a4e.rst
    A llvm/docs/AMDGPU/gfx8_vsrc_6802ce.rst
    A llvm/docs/AMDGPU/gfx8_vsrc_e016a1.rst
    A llvm/docs/AMDGPU/gfx8_vsrc_fd235e.rst

  Log Message:
  -----------
  [AMDGPU][GFX8][DOC][NFC] Update assembler syntax description

Summary of changes:
- Updated MUBUF lds syntax (see https://reviews.llvm.org/D124485).
- Enabled literals with src0 for v_madak*, v_madmk* (see https://reviews.llvm.org/D111067).
- Minor bug fixing.




More information about the All-commits mailing list