[all-commits] [llvm/llvm-project] eaf48d: [VPlan] Replace BranchOnCount with BranchOnCond if...
Florian Hahn via All-commits
all-commits at lists.llvm.org
Mon Jun 6 01:39:22 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: eaf48dd9b079c005d92ed9ef858f12bc452e71ef
https://github.com/llvm/llvm-project/commit/eaf48dd9b079c005d92ed9ef858f12bc452e71ef
Author: Florian Hahn <flo at fhahn.com>
Date: 2022-06-06 (Mon, 06 Jun 2022)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/pr34438.ll
M llvm/test/Transforms/LoopVectorize/X86/pr42674.ll
Log Message:
-----------
[VPlan] Replace BranchOnCount with BranchOnCond if TC <= UF * VF.
Try to simplify BranchOnCount to `BranchOnCond true` if TC <= UF * VF.
This is an alternative to D121899 which simplifies the VPlan directly
instead of doing so late in code-gen.
The potential benefit of doing this in VPlan is that this may help
cost-modeling in the future. The reason this is done in prepareToExecute
at the moment is that a single plan may be used for multiple VFs/UFs.
There are further simplifications that can be applied as follow ups:
1. Replace inductions with constants
2. Replace vector region with regular block.
Fixes #55354.
Depends on D126679.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D126680
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