[all-commits] [llvm/llvm-project] 2dfe41: [AMDGPU] Improve codegen of extractelement/inserte...

[Julien Pagès via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2dfe41944658a006dc3f89316b1448cfec0131c6
      https://github.com/llvm/llvm-project/commit/2dfe41944658a006dc3f89316b1448cfec0131c6
  Author: Julien Pages <Julien.Pages at amd.com>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll

  Log Message:
  -----------
  [AMDGPU] Improve codegen of extractelement/insertelement in some cases

This patch improves the codegen of extractelement and insertelement for vector
containing 8 elements. Before, a dag combine transformation was generating a
sequence of 8 select/cmp.
This patch changes the upper limit for this transformation and the movrel
instruction will eventually be used instead. Extractlement/insertelement for
vectors containing less than 8 elements are unchanged.

Differential Revision: https://reviews.llvm.org/D126389