[all-commits] [llvm/llvm-project] a92ed1: [ValueTypes] Define MVTs for v128i2/v64i4 as well ...

Hendrik Greving via All-commits all-commits at lists.llvm.org
Wed Jun 1 18:06:03 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a92ed167f2c98d332ad7ce5b0544444b8e917bc0
      https://github.com/llvm/llvm-project/commit/a92ed167f2c98d332ad7ce5b0544444b8e917bc0
  Author: Hendrik Greving <hgreving at google.com>
  Date:   2022-06-02 (Thu, 02 Jun 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/ValueTypes.td
    M llvm/include/llvm/Support/MachineValueType.h
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/CodeGen/ValueTypes.cpp
    M llvm/lib/IR/Function.cpp
    M llvm/test/CodeGen/AArch64/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/AMDGPU/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/Mips/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/Thumb/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/X86/bitreverse.ll
    M llvm/test/CodeGen/X86/srem-seteq-illegal-types.ll
    M llvm/test/TableGen/intrinsic-pointer-to-any.td
    M llvm/utils/TableGen/CodeGenTarget.cpp
    M llvm/utils/TableGen/IntrinsicEmitter.cpp

  Log Message:
  -----------
  [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4.

Adds MVT::v128i2, MVT::v64i4, and implied MVT::i2, MVT::i4.

Keeps MVT::i2, MVT::i4 lowering actions as expand, which should be
removed once targets set this explicitly.

Adjusts 11 lit tests to reflect slightly different behavior during
DAG combine.

Differential Revision: https://reviews.llvm.org/D125247




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