[all-commits] [llvm/llvm-project] 1a155e: [RegisterClassInfo] Invalidate cached information ...

[qcolombet via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1a155ee7de3b62a2fabee86fb470a1554fadc54d
      https://github.com/llvm/llvm-project/commit/1a155ee7de3b62a2fabee86fb470a1554fadc54d
  Author: Quentin Colombet <qcolombet at apple.com>
  Date:   2022-06-01 (Wed, 01 Jun 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/RegisterClassInfo.h
    M llvm/lib/CodeGen/RegisterClassInfo.cpp

  Log Message:
  -----------
  [RegisterClassInfo] Invalidate cached information if ignoreCSRForAllocationOrder changes

Even if CSR list is same between functions, we could have had a different
allocation order if ignoreCSRForAllocationOrder is evaluated differently.
Hence invalidate cached register class information if
ignoreCSRForAllocationOrder changes.

Patch by Srividya Karumuri <srividya_karumuri at apple.com>

Differential Revision: https://reviews.llvm.org/D126565