[all-commits] [llvm/llvm-project] a0dcbe: llvm-reduce: Add reduction pass to remove regalloc...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a0dcbe45bd8387da51f94e4d171c3ecc3d266e64
      https://github.com/llvm/llvm-project/commit/a0dcbe45bd8387da51f94e4d171c3ecc3d266e64
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-06-01 (Wed, 01 Jun 2022)

  Changed paths:
    M llvm/test/tools/llvm-reduce/mir/preserve-reg-hints.mir
    A llvm/test/tools/llvm-reduce/mir/reduce-register-hints.mir
    M llvm/tools/llvm-reduce/CMakeLists.txt
    M llvm/tools/llvm-reduce/DeltaManager.cpp
    M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
    A llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
    A llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.h

  Log Message:
  -----------
  llvm-reduce: Add reduction pass to remove regalloc hints

I'm a bit confused by what's actually stored for the allocation
hints. The MIR parser only handles the "simple" case where there's a
single hint. I don't really understand the assertion in
clearSimpleHint, or under what circumstances there are multiple hint
registers.