[all-commits] [llvm/llvm-project] d5af6a: [X86] LowerMINMAX - split v4i64 types on AVX1 targ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d5af6a38082b39ae520a328e44dc29ebcb036bb2
      https://github.com/llvm/llvm-project/commit/d5af6a38082b39ae520a328e44dc29ebcb036bb2
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-05-31 (Tue, 31 May 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/horizontal-reduce-smax.ll
    M llvm/test/CodeGen/X86/horizontal-reduce-smin.ll
    M llvm/test/CodeGen/X86/horizontal-reduce-umax.ll
    M llvm/test/CodeGen/X86/horizontal-reduce-umin.ll
    M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
    M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
    M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
    M llvm/test/CodeGen/X86/vec_minmax_sint.ll
    M llvm/test/CodeGen/X86/vec_minmax_uint.ll
    M llvm/test/CodeGen/X86/vector-pcmp.ll
    M llvm/test/CodeGen/X86/vector-reduce-smax.ll
    M llvm/test/CodeGen/X86/vector-reduce-smin.ll
    M llvm/test/CodeGen/X86/vector-reduce-umax.ll
    M llvm/test/CodeGen/X86/vector-reduce-umin.ll
    M llvm/test/CodeGen/X86/vector-trunc-packus.ll
    M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
    M llvm/test/CodeGen/X86/vector-trunc-usat.ll
    M llvm/test/CodeGen/X86/vselect-minmax.ll

  Log Message:
  -----------
  [X86] LowerMINMAX - split v4i64 types on AVX1 targets (Issue #55648)

Originally we tried to use default expansion for v4i64 types to make it easier to concatenate the results back together, but this can cause infinite loop issues with existing VSELECT splitting code in narrowExtractedVectorSelect if we have other uses of the VSELECT results (e.g. reduction patterns).

To fix the infinite loop, this patch always splits MIN/MAX v4i64 nodes during lowering and I've added a TODO for combineConcatVectorOps to investigate when we can cheaply concatenate VSELECT/BLENDV nodes together.

Fixes #55648 - regression test case will be added in a follow up.


  Commit: a7317a5728edc67bac2cb6d774e649bba10eb533
      https://github.com/llvm/llvm-project/commit/a7317a5728edc67bac2cb6d774e649bba10eb533
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-05-31 (Tue, 31 May 2022)

  Changed paths:
    A llvm/test/CodeGen/X86/pr55648.ll

  Log Message:
  -----------
  [X86] Add test case for PR55648


Compare: https://github.com/llvm/llvm-project/compare/259a9df963ca...a7317a5728ed