[all-commits] [llvm/llvm-project] aaaf9c: [X86][AMX] Replace LDTILECFG with PLDTILECFGV on a...

[Luo, Yuanke via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: aaaf9cede774a3a82770e88a8096b8c605bdb2c0
      https://github.com/llvm/llvm-project/commit/aaaf9cede774a3a82770e88a8096b8c605bdb2c0
  Author: Luo, Yuanke <yuanke.luo at intel.com>
  Date:   2022-05-27 (Fri, 27 May 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
    M llvm/lib/Target/X86/X86FastTileConfig.cpp
    M llvm/lib/Target/X86/X86InstrAMX.td
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86PreTileConfig.cpp
    M llvm/lib/Target/X86/X86TileConfig.cpp
    M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
    M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
    M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir
    M llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir
    M llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
    M llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir
    M llvm/test/CodeGen/X86/AMX/amx-tile-intrinsics.ll

  Log Message:
  -----------
  [X86][AMX] Replace LDTILECFG with PLDTILECFGV on auto-config.

There is intrinsic `@llvm.x86.ldtilecfg` which is lowered to LDTILECFG.
This intrinsic is open for user to configure tile registers by
themselves. There is a chance that `@llvm.x86.ldtilecfg` would be mixed
with the new AMX intrinsics which depend on compiler to configure tile
registers. Separate pusedo instruction PLDTILECFGV would avoid
unexpected behavious when `@llvm.x86.ldtilecfg` is mixed with new AMX
intrinsics. Though user should not mix the two programming model,
compiler should avoid crash or UB when they are mixed.

Differential Revision: https://reviews.llvm.org/D126519