[all-commits] [llvm/llvm-project] e9ac99: [RISCV] Simplfy creation of IndexVT in lowerMasked...

Craig Topper via All-commits all-commits at lists.llvm.org
Thu May 26 13:13:50 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e9ac99b6090c125091b61240c75dcc403d569472
      https://github.com/llvm/llvm-project/commit/e9ac99b6090c125091b61240c75dcc403d569472
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-05-26 (Thu, 26 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Simplfy creation of IndexVT in lowerMaskedGather/lowerMaskedScatter. NFC

The scalar element width is not a factor in how ContainerVT is
determined. We don't need to check the relative size of VT and
IndexVT.


  Commit: 460781feef56bdff3e3a88fb76b427a88795641b
      https://github.com/llvm/llvm-project/commit/460781feef56bdff3e3a88fb76b427a88795641b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-05-26 (Thu, 26 May 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
    M llvm/test/CodeGen/RISCV/rotl-rotr.ll

  Log Message:
  -----------
  [LegalizeTypes] Fix bug in expensive checks verification

With a fix for an expensive checks build failure exposed by new RISC-V tests.
Something about expanding two rotates in type legalization caused a change
in the remapping tables that the expensive checks verifying wasn't expecting.
See comment in the code for how it was fixed.

Tests came from this commit that exposed the bug
[RISCV] Add test cases showing failure to remove mask on rotate amounts.

If the masking AND has multiple users we fail to remove it.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D126036


Compare: https://github.com/llvm/llvm-project/compare/75ac914b148d...460781feef56


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