[all-commits] [llvm/llvm-project] afe499: [RISCV] Allow compatible VTYPE in AVL Reg Forward ...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: afe49934a68afdf44dcd48489d9f5e820bc5424d
      https://github.com/llvm/llvm-project/commit/afe49934a68afdf44dcd48489d9f5e820bc5424d
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-05-26 (Thu, 26 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

  Log Message:
  -----------
  [RISCV] Allow compatible VTYPE in AVL Reg Forward cases

During insertion of VSETVLI, we have two related bits of code which decide whether we can reuse a previous vsetvli result. As was pointed out in the original review, these cases can allow any prior state for which we know that VL is the same for any value of AVL.

This was originally separated out of a desire for separate tests and review. As it turns out, finding a test case for this has been quite challenging. Most of the cases I tried, we manage to already get through other chains of logic. We do have one correct test change, but that only exercises one of the two changes.

Differential Revision: https://reviews.llvm.org/D126400