[all-commits] [llvm/llvm-project] 1f0639: Reapply "[RISCV] Enable strict assertions in Inser...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1f06398e96d4508d22f42b760f70eb5d4e7b1dc9
      https://github.com/llvm/llvm-project/commit/1f06398e96d4508d22f42b760f70eb5d4e7b1dc9
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-05-25 (Wed, 25 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

  Log Message:
  -----------
  Reapply "[RISCV] Enable strict assertions in InsertVSETVLI data flow"

be2cb8 fixes the case which triggered the revert.  Reapply, and let's see if anything else falls out.

Original commit message:

These asserts are believed to hold after several recent miscompiles have been fixed.  If you see an assertion failure on this change, please toggle the default back and make sure you file a bug with a reproducer.  We may have as yet uncaught miscompiles lurking in this code.

Differential Revision: https://reviews.llvm.org/D125271