[all-commits] [llvm/llvm-project] 29a5a7: [RISCV] Add pre-emit pass to make more instruction...

[lewis-revill via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 29a5a7c6d47aa9fd6c715508491c8f110f706869
      https://github.com/llvm/llvm-project/commit/29a5a7c6d47aa9fd6c715508491c8f110f706869
  Author: Lewis Revill <lewis.revill at embecosm.com>
  Date:   2022-05-25 (Wed, 25 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/RISCV.h
    A llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    A llvm/test/CodeGen/RISCV/make-compressible-rv64.mir
    A llvm/test/CodeGen/RISCV/make-compressible.mir

  Log Message:
  -----------
  [RISCV] Add pre-emit pass to make more instructions compressible

When optimizing for size, this pass searches for instructions that are
prevented from being compressed by one of the following:

1. The use of a single uncompressed register.
2. A base register + offset where the offset is too large to be
   compressed and the base register may or may not already be compressed.

In the first case, if there is a compressed register available, then the
uncompressed register is copied to the compressed register and its uses
replaced. This is only done if there are enough uses that code size
would be improved.

In the second case, if a compressed register is available, then the
original base register is copied and adjusted such that:

new_base_register = base_register + adjustment
base_register + large_offset = new_base_register + small_offset

and the uses of the base register are replaced with the new base
register. Again this is only done if there are enough uses for code size
to be improved.

This pass was authored by Lewis Revill, with large offset optimization
added by Craig Blackmore.

Differential Revision: https://reviews.llvm.org/D92105