[all-commits] [llvm/llvm-project] 5df666: [AMDGPU] Enforce alignment of image vaddr on gfx90a

[Stanislav Mekhanoshin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5df6669d45bc72df8a9ac7fb0f4f4cfc00444e0d
      https://github.com/llvm/llvm-project/commit/5df6669d45bc72df8a9ac7fb0f4f4cfc00444e0d
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2022-05-24 (Tue, 24 May 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
    M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
    A llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir

  Log Message:
  -----------
  [AMDGPU] Enforce alignment of image vaddr on gfx90a

Even though single address image instructions only use a single VGPR
HW accesses 4 or 5 which creates alignment requirement.

Fixes: SWDEV-316648

Differential Revision: https://reviews.llvm.org/D126009