[all-commits] [llvm/llvm-project] a86cfa: [ARM] Add register-mask for tail returns

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a86cfaea549799c1083b21f664489f131937c148
      https://github.com/llvm/llvm-project/commit/a86cfaea549799c1083b21f664489f131937c148
  Author: David Green <david.green at arm.com>
  Date:   2022-05-21 (Sat, 21 May 2022)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/test/CodeGen/ARM/dbg-tcreturn.ll
    M llvm/test/DebugInfo/ARM/instr-ref-tcreturn.ll

  Log Message:
  -----------
  [ARM] Add register-mask for tail returns

The TC_RETURN/TCRETURNdi under Arm does not currently add the
register-mask operand when tail folding, which leads to the register
(like LR) not being 'used' by the return. This changes the code to
unconditionally set the register mask on the call, as opposed to
skipping it for tail calls.

I don't believe this will currently alter any codegen, but should glue
things together better post-frame lowering. It matches the AArch64 code
better.

Differential Revision: https://reviews.llvm.org/D125906