[all-commits] [llvm/llvm-project] 7fcbf1: [InstCombine] add casted bitwise logic tests to sh...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7fcbf133ba9d1228bdc305b5183d9879e516045a
      https://github.com/llvm/llvm-project/commit/7fcbf133ba9d1228bdc305b5183d9879e516045a
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-05-20 (Fri, 20 May 2022)

  Changed paths:
    M llvm/test/Transforms/InstCombine/and-xor-or.ll

  Log Message:
  -----------
  [InstCombine] add casted bitwise logic tests to show missing use check; NFC

While here, update the auto-generated checks to also check
the match the function parameters - there was a potential
miscompile that would go unnoticed with the more lenient
check lines.


  Commit: f0071d43e4d30a0bc224020abb52fa77054d2520
      https://github.com/llvm/llvm-project/commit/f0071d43e4d30a0bc224020abb52fa77054d2520
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-05-20 (Fri, 20 May 2022)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/test/Transforms/InstCombine/and-xor-or.ll

  Log Message:
  -----------
  [InstCombine] add use check to fold of bitwise logic with cast ops

This was shown as a potential regression in D126040.


Compare: https://github.com/llvm/llvm-project/compare/fc9c59c355cb...f0071d43e4d3