[all-commits] [llvm/llvm-project] 8765ad: [AArch64][SME][NFC] Add implicit operands for SME ...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8765ad42cd01717b739a8389584cc8eb9d09a093
      https://github.com/llvm/llvm-project/commit/8765ad42cd01717b739a8389584cc8eb9d09a093
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2022-05-20 (Fri, 20 May 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
    M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.h
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h

  Log Message:
  -----------
  [AArch64][SME][NFC] Add implicit operands for SME instructions in the disassembly.

This patch simplifies the switch statement in getInstruction to add
implicit operands (register ZA and Immediate  equal to zero)
in the SME operands when disassembly.

The register ZA and the zero immediate  can be added by checking the operand
in MCInstDesc.

Differential Revision: https://reviews.llvm.org/D125534