[all-commits] [llvm/llvm-project] 11a7e7: [RISCV] Canonicalize AVL=setvli to AVL=Imm or AVL=...

Philip Reames via All-commits all-commits at lists.llvm.org
Tue May 17 11:46:40 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 11a7e77c95ddcb51779d9e9d804222eb45a1da92
      https://github.com/llvm/llvm-project/commit/11a7e77c95ddcb51779d9e9d804222eb45a1da92
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-05-17 (Tue, 17 May 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

  Log Message:
  -----------
  [RISCV] Canonicalize AVL=setvli to AVL=Imm or AVL=VLMAX

This patch adds a transform to the local prepass in InsertVSETVLI which canonicalizes an AVL of a register from another vsetvli into immediate or VLMAX when VTYPE is the same. In this patch, I chose to be conservative and avoid arbitrary vreg forwarding due to profitability concerns about possibility overlapping live ranges.

This has the effect of eliminating vsetvli instructions in loops which are walking either VLMAX or a constant number of lanes per iteration.

Differential Revision: https://reviews.llvm.org/D125812




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