[all-commits] [llvm/llvm-project] f7709a: [RISCV] Add a test showing incorrect RVV stack ali...
Fraser Cormack via All-commits
all-commits at lists.llvm.org
Tue May 17 08:06:46 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: f7709a059ac0ef1edaa2dc83321a4d972933e975
https://github.com/llvm/llvm-project/commit/f7709a059ac0ef1edaa2dc83321a4d972933e975
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2022-05-17 (Tue, 17 May 2022)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
Log Message:
-----------
[RISCV] Add a test showing incorrect RVV stack alignment
The RISC-V stack is assumed to be aligned to 16 bytes and can handle stack
realignment for larger objects, but the "RVV stack" is only ensured to be
aligned to 8 bytes. This means that objects specified at a larger alignment may
be misaligned, not only for 16-byte-aligned RVV objects that don't trigger
realignment, but also for 32-byte-and-larger-aligned objects which do.
The new test checks a variety of alignment configurations, showing the
misaligned cases.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D110933
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