[all-commits] [llvm/llvm-project] ee8aa3: [AArch64] Use ADDV for boolean xor reductions.

[paulwalker-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ee8aa351e43f27e1dd4240560a3e054ca045186f
      https://github.com/llvm/llvm-project/commit/ee8aa351e43f27e1dd4240560a3e054ca045186f
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2022-05-16 (Mon, 16 May 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/reduce-xor.ll

  Log Message:
  -----------
  [AArch64] Use ADDV for boolean xor reductions.

NEON does not have native support for xor reductions. However, when
reducing predicate vectors the operation is synonymous with an add
reduction that is supported.

Differential Revision: https://reviews.llvm.org/D125605