[all-commits] [llvm/llvm-project] e6fc84: [DAGCombiner] Fix incorrect indentation. NFC

Craig Topper via All-commits all-commits at lists.llvm.org
Mon May 16 09:38:32 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e6fc8454bee5dc89be27fe1db826fb0bb30d74aa
      https://github.com/llvm/llvm-project/commit/e6fc8454bee5dc89be27fe1db826fb0bb30d74aa
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-05-16 (Mon, 16 May 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  [DAGCombiner] Fix incorrect indentation. NFC


  Commit: 1c4880a2d39fbd95edced0dd97c34a9f53bf62ff
      https://github.com/llvm/llvm-project/commit/1c4880a2d39fbd95edced0dd97c34a9f53bf62ff
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-05-16 (Mon, 16 May 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/PowerPC/popcnt-zext.ll
    M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
    M llvm/test/CodeGen/X86/parity-vec.ll
    M llvm/test/CodeGen/X86/popcnt.ll

  Log Message:
  -----------
  [TargetLowering] Expand the last stage of i16 popcnt using shift+add+and instead of mul+shift.

If we use multiply it would be with 0x0101 which is 1 more than a power
of 2. On some targets we would expand this to shl+add. By avoiding the
multiply earlier, we can generate better code.

Note, PowerPC doesn't do the shl+add expansion of multiply so one of
the tests increased in instruction count.

Limiting to scalars because it almost always increased the number of
instructions in vector tests.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D125638


  Commit: 74f6ded49d8cc745cb28b74e57346d948bac2b2d
      https://github.com/llvm/llvm-project/commit/74f6ded49d8cc745cb28b74e57346d948bac2b2d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-05-16 (Mon, 16 May 2022)

  Changed paths:
    M llvm/test/CodeGen/AArch64/arm64-rev.ll
    M llvm/test/CodeGen/ARM/rev.ll
    M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
    M llvm/test/CodeGen/Thumb/rev.ll
    M llvm/test/CodeGen/X86/bswap.ll

  Log Message:
  -----------
  [AArch64][ARM][RISCV][X86] Add test cases for PR55484. NFC

This bug is in generic DAG combine and easily reproducible on many
targets.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D125640


Compare: https://github.com/llvm/llvm-project/compare/e2df48bb23d7...74f6ded49d8c


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